******************************************************************** ** CALL FOR PAPERS ** SUBMISSION DEADLINE: January 26, 2007 Topic 13: High performance networks EURO-PAR 2007 August 28 - August 31, 2007 Rennes, France Web site: http://europar2007.irisa.fr/ ******************************************************************** Topic 13 High performance networks Description This topic is devoted to communication issues in scalable compute and storage systems, such as parallel computers, networks of workstations, and clusters. All aspects of communication in modern systems are of interest, including advances in the design, implementation, and evaluation of interconnection networks, network interfaces, system and storage area networks, on-chip interconnects, communication protocols, routing and communication algorithms, and communication aspects of parallel and distributed algorithms. Submitted papers should present significant, original work in the practice or theory of addressing aspects of performance, reliability and availability, power consumption and heat disspation, cost, scalability, and management. The scope of the topic includes, but is not limited to: Focus # Interconnection networks # Switch architectures # Network adapters # High-speed system area networks for cluster computing # I/O architectures and storage area networks # On-chip and power-efficient interconnects # Lightweight and user-level communication protocols # Routing algorithms # Congestion management # Fault-tolerant and reconfigurable networks # Multimedia and QoS-aware communication # Network performance evaluation and analysis # Communication costs of parallel and distributed algorithms # Collective communication and synchronization support Organization Global Chair Thilo Kielmann Vrije Universiteit Amsterdam, The Netherland Local Chair Pascale Primet Laboratoire d'Informatique du Parallélisme (LIP) Ecole Normale Superieure Lyon, France Vice Chair Bruce Lowekamp Computer Science Department College of William and Mary Williamsburg, USA Vice Chair Tomohiro Kudoh Department of Electrical Engineering Keio University Japan