"Register before this Tuesday August 15th to save upto $125.00 on late/on-site registration fee. ------------------------------ APOLOGIES FOR MULTIPLE POSTING ------------------------------ IEEE Hot Interconnects 14 http://www.hoti.org CALL FOR PARTICIPATION Stanford University, Palo Alto, CA USA August 23-25, 2006 IMPORTANT DATES EARLY REGISTRATION DEADLINE AUGUST 15, 2005 Sponsored by the IEEE Computer Society Technical Committee on Microprocessors and Microcomputers (TCMCOMP) Technical co-sponsorship by the IEEE Communications Society Technical Committee on High-Speed Networking (TCHSN) The international forum where the high-performance computing and high speed networking communities meet. -- Hot Interconnects is the premier international forum for researchers and developers of state-of-the-art hardware and software architectures and implementations for interconnection networks of all scales, ranging from on-chip processor--memory interconnects to wide-area networks. This yearly conference is very well attended by leaders in industry and academia. The atmosphere provides for a wealth of opportunities to interact with individuals at the forefront of this field. HotI 14 will feature 2 KEYNOTES, a 2-day single track TECHNICAL SESSION, 2 PANELS, and 1 full day of TUTORIALS. Here below you can find a summary of the comprehensive information that you might find at www.hoti.org. ---------------------------------------------------------------- August 23-24, 2005 Keynotes, Technical Sessions, Panels ---------------------------------------------------------------- KEYNOTES "Next Generation Networking for Parallel Systems", Dr. Rama K. Govindaraju, IBM Corporation "Requirements for Programming Modern FPGA Platforms", Dr. Ivo Bolsens, Xilinx TECHNICAL SESSIONS Technical session on "System Level Interconnects", "Optical Interconnects", "Interconnect Technologies and Platforms", "Router and Switch Architecture", "Buffer Management and Scheduling" PANELS Title: "Protocol off-loading vs protocol on-loading in high performance networks" Moderator: Fabrizio Petrini, Pacific Northwest National Laboratory Panelist: Lloyd Dickman (Qlogic) Patrick Geoffray (Myricom) Jeff Mogul (HP) Gary Montry (NetEffect) Greg Reigner (Intel) James P.G. Sterbenz (University of Kansas (US) and Lancaster University (UK) Pete Wychoff (Ohio Supercomputing Center) Title: "Challenges for Future Interconnection Networks: Power, Reliability, and Performance Scalability?" Moderator: Timothy Pinkston, National Science Foundation and Univ. of Southern California Panelists: Dennis Abts (Cray) Bill Dally (Stanford University) Jay Jayasimha (Intel) Doug Joseph (IBM T.J. Watson Research) Steve Keckler (U.T. Austin) Dhabaleswar K. (DK) Panda (Ohio State University) ---------------------------------------------------------------- August 25, 2005 Tutorials ---------------------------------------------------------------- "High-Speed networking: A Systematic Approach to High-Bandwidth Low-Latency Communication", Dr. J. Sterbenz "Storage Networks, Protocols and File Systems: Latest Trends?" Prof. Dhabaleswar K. (DK) Panda, The Ohio State University and Dr. Weikuan Yu, Oak Ridge National Laboratory "New Internet and Networking Technologies for Grids and High-Performance Computing", Congduc PHAM, University of Pau, France "Dynamic Optical Network for Grid Computing", Wes Doonan,ADVA Optical Networking ---------------------------------------------------------------- www.hoti.org ---------------------------------------------------------------- -- --- Luca Valcarenghi, Ph.D. Scuola Superiore Sant'Anna di Studi Universitari e di Perfezionamento Sant'Anna School of University Studies and Doctoral Research Center of Excellence for Communications Networks Engineering (CEIRC) via G. Moruzzi 1, 56124, Pisa (PI), Italy ph.: +39-0505492138 fax: +39-0505492194 web: http://www.pisa.cnit.it/people/Members/valcarenghi